Vertical bipolar junction transistors are widely used by the semiconductor industry as devices in integrated circuit architectures. As is well-known in the semiconductor industry, the electrical characteristics of such transistors are influenced strongly by a layer of an interfacial tunnel insulator interposed between a base region formed in a monocrystalline silicon substrate and an extrinsic emitter region of polycrystalline silicon (polysilicon) deposited thereon. Because the interfacial tunnel insulator limits reverse injection of majority carriers across the reverse biased base-emitter junction, the base current of the transistor will be minimized. The reduction in the operative base current concomitantly increases the current gain of the transistor.
The presence of a tunnel insulator can increase the current gain by a factor of about two to three. However, current gain will be maximized only by an optimal thickness of tunnel insulator. If the tunnel insulator is overly-thick, the tunneling of minority carriers is limited. As a result, the effective resistance of the emitter-base junction exceeds a desirable value. If the tunnel insulator is overly-thin, the reverse injection of majority carriers is not reduced from the base region to the emitter region. As a result, any potential benefit from the presence of the tunnel insulator is unrealized.
Conventional fabrication techniques for vertical bipolar junction transistors rely upon an interfacial layer of oxide (SiO.sub.2) as the tunnel insulator. Typically, the layer of oxide is composed of a native oxide. Native oxide grows naturally and spontaneously upon an unpassivated surface of a silicon substrate while that surface is exposed to the ambient oxygen content of the atmosphere. Typically, the layer of native oxide attains a thickness of between about 1 nm and about 5 nm.
A major disadvantage of relying upon native oxide as the tunnel insulator is that its nominal thickness is difficult to controllably reproduce.
Although the ultimate thickness is diffusion-limited, the nominal thickness of native oxide increases with lengthening exposure to the oxygen-laden atmosphere. Due to variable, indefinite time delays between processing steps, the thickness of the native oxide can widely vary for a single batch of silicon substrates or between successive batches. Therefore, batch fabrication may yield transistors having a wide range of current gains.
Device designs are engineered to accommodate the variation since elimination of the interfacial tunnel oxide drastically reduces the current gain of the transistor. However, the prior art has neither disclosed nor taught a method for controlling the thickness of the tunnel insulator. Simplistically, the thickness may be controlled by tightly managing the interval between successive fabrication steps and using automated mechanical loaders. In a manufacturing environment, however, mere temporal control is considered an impractical and inefficient solution.
Thus, what is ideally desired is a reproducible and predictable method of providing a tunnel insulator to enhance the current gain of a vertical bipolar junction transistor having a polysilicon emitter.